Hello,
Our DSI encoder takes the form of an on-chip DPI to DSI bridge. It's all in hardware. No DSI related signals are visible in software.
You would need a MIPI D-PHY analyser to make sense of the output; though looking at it with a fast oscilloscope can provide some clues (especially when only 1 data lane is in use and the clock rate isn't very high).
Our driver needs a bit of debugging right now... By the way there is a driver for a similar block here which might be interesting to refer to.
Our DSI encoder takes the form of an on-chip DPI to DSI bridge. It's all in hardware. No DSI related signals are visible in software.
You would need a MIPI D-PHY analyser to make sense of the output; though looking at it with a fast oscilloscope can provide some clues (especially when only 1 data lane is in use and the clock rate isn't very high).
Our driver needs a bit of debugging right now... By the way there is a driver for a similar block here which might be interesting to refer to.
Statistics: Posted by njh — Wed Jul 03, 2024 9:40 am