Just got some Pico2's and have been testing out the SPI Master/Slave examples. It appears that the CS# line still has to transition from a logic low to high after every 8 bits sent from the SPI Master in order for the SPI Slave to correctly receive a stream of bytes using the Pico_SDK spi_write_read_blocking() call.
Can someone confirm that the Pico2 uses the same flawed Arm PrimeCell PL022 r1p3 synchronous serial port (with respect to SPI Slave that is) as in the original Pico?
Can someone confirm that the Pico2 uses the same flawed Arm PrimeCell PL022 r1p3 synchronous serial port (with respect to SPI Slave that is) as in the original Pico?
Statistics: Posted by pej02 — Tue Aug 20, 2024 7:25 pm