Is there a recommended way to do this? Would the external resistor network shown below work?Taken from http://www.latticesemi.com/view_documen ... t_id=47960.
The context is I want to interface HSTX outputs with Sub-LVDS differential inputs of a Lattice CrossLink-NX FPGA. RP2350 and FPGA IOVDD is 1.8V.
The context is I want to interface HSTX outputs with Sub-LVDS differential inputs of a Lattice CrossLink-NX FPGA. RP2350 and FPGA IOVDD is 1.8V.
Statistics: Posted by alastairpatrick — Fri Jan 24, 2025 9:41 pm